View MM1311_464646.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

MITSUMI
I2C BUS Control 4-Input 1-Output AV Switch MM1311
I2C BUS Control 4-Input 1-Output AV Switch
Monolithic IC MM1311
Outline
This IC is a 4-input 1-output AV switch with I2C control, developed for use in televisions.
Features
1. Serial control by I2C BUS. 2. 4 inputs, 1 output. 3. Video and audio system switches can be controlled independently. 4. 6 dB amplifier built in to video system. 5. Built-in Y/C MIX circuit. 6. Slave address can be changed : 90H or 92H. 7. Audio muting possible by external pin. 8. Maintains high impedance even when I2C BUS line (SDA, SCL) power supply is off. 9. Built-in 3 value discrimination function. 10. On-chip power ON reset function. 11. Two types of audio input impedance : 60k and 30k. MM1311AD : 60k MM1311BD : 30k
Package
SDIP-32A (MM1311AD, MM1311BD)
Applications
1. Television 2. Other video equipment
MITSUMI
I2C BUS Control 4-Input 1-Output AV Switch MM1311
Equivalent Block Diagram
MITSUMI
I2C BUS Control 4-Input 1-Output AV Switch MM1311
Pin Description
Pin No. 31 1 7 13 3 9 22 5 11 20 Name MTV-V V1-V V2-V V3-V V1-Y V2-Y YIN V1-C V2-C CIN BIAS 24 23 LOUT ROUT Internal equivalent circuit diagram Pin No. 27 29 Name YOUT COUT Internal equivalent circuit diagram
26
32 2 8 14 30 4 10 15 25
MTV-L V1-L V2-L V3-L MTV-R V1-R V2-R V3-R VOUT 17 SDA 18 SCL
6 12 16 19
S1 S2 ADR Mute
Absolute Maximum Ratings
Item Storage temperature Operating temperature Power supply voltage Allowable power dissipation
(Ta=25C) Symbol TSTG TOPR VCC Pd Ratings -40~+125 -20~+75 12 950 Units C C V mW
MITSUMI
I2C BUS Control 4-Input 1-Output AV Switch MM1311
Electrical Characteristics
Item Operating power supply voltage Current consumption VOUT output Voltage gain Frequency characteristics
(Ta=25C, VCC=9V) Measure ment pin 28 TP1 TP1 TP1 Conditions (unless otherwise indicated, Measurement Circuit Figure 1) VCC=9V, no signal, no load Sine wave, 1.0VP-P, 100kHz 5.5 Sine wave, 1.0VP-P, 10MHz/100kHz -1.0 Vn-V : Staircase, 1VP-P APL=10~90% Vn-Y : Staircase (luminance signal) 1VP-P -3 Vn-C : Chroma signal 0.3VP-P APL=10~90% Vn-V : Staircase, 1VP-P APL=10~90% Vn-Y : Staircase (luminance signal) 1VP-P -3 Vn-C : Chroma signal 0.3VP-P APL=10~90% Sine wave, 100kHz Maximum input for total higher 1.6 harmonic distortion factor < 1.0% Vn-Y : Sine wave, 1.0VP-P, 100kHz YIN : Sine wave, 2.0VP-P, 100kHz Vn-Y : Sine wave, 1.0VP-P 10MHz/100kHz YIN : Sine wave, 2.0VP-P, 10MHz/100kHz Vn-Y : Staircase, 1VP-P APL=10~90% YIN : Staircase, 2VP-P, APL=10~90% Vn-Y : Staircase, 1VP-P APL=10~90% YIN : Staircase, 2VP-P, APL=10~90% Vn-Y : Sine wave100kHz Maximum input for total higher harmonic distortion factor < 1.0% YIN : Sine wave, 100kHz Maximum input for total higher harmonic distortion factor < 1.0% Vn-C : Sine wave, 1.0VP-P, 100kHz CIN : Sine wave, 2.0VP-P, 100kHz Vn-C : Sine wave, 1.0VP-P 10MHz/100kHz CIN : Sine wave, 2.0VP-P, 10MHz/100kHz CIN : Staircase, 2VP-P, APL=10~90% CIN : Staircase, 2VP-P, APL=10~90% Vn-C : Sine wave, 100kHz Maximum input for total higher harmonic distortion factor < 1.0% CIN : Sine wave, 100kHz Maximum input for total higher harmonic distortion factor < 1.0% Vn-C, CIN b7=0, Sine wave, 2.5VP-P, 1kHz b7=1, Sine wave, 2.5VP-P, 1kHz Sine wave, 2.5VP-P, 1MHz/1kHz 5.5 -0.5 -1.0 -1.0 -3 -3 1.6 3.2
Symbol VCC ICC GV FV DGV
Min. Typ. Max. Units 8 9 27 6.0 0 0 10 35 6.5 1.0 3 V mA dB dB %
Differential gain
Differential phase
DPV
TP1
0
3
deg
Input dynamic range YOUT output Voltage gain Frequency characteristics
DV1 GY1 GY2 FY1 FY2
SG 1~3 TP2 TP2 TP2 TP2 TP2 TP2 SG2 SG4
1.9 6.0 0 0 0 0 0 1.9 6.5 0.5 1.0 1.0 3 3
VP-P
dB dB % deg
Differential gain
DGY DPY DY1
Differential phase
Input dynamic range DY2 Output impedance COUT output Voltage gain Frequency characteristics Differential gain Differential phase ZOY GC1 GC2 FC1 FC2 DGC DPC DC1 Input dynamic range DC2 Input impedance Output impedance LOUT output Voltage gain Frequency characteristics ZIC ZOC GL1 GL2 FL TP4 TP4 TP4 SG5 TP3 TP3 TP3 TP3 TP3 TP3 SG3
VP-P 3.8 50 5.5 -0.5 -1.0 -1.0 -3 -3 2.75 5.5 10 -6.5 -0.5 -3.0 6.0 0 0 0 0 0 3.25 VP-P 6.5 15 50 -6.0 0 0 20 -5.5 0.5 1.0 k dB dB 6.5 0.5 1.0 1.0 3 3 dB dB % deg
MITSUMI
I2C BUS Control 4-Input 1-Output AV Switch MM1311
Item
Symbol
Measure ment pin TP4 SG6 24
Total higher harmonic distortion THDL Input dynamic range Output offset voltage Input impedance Output impedance ROUT output Voltage gain DL VOFFL ZIL ZOL
Conditions (unless otherwise indicated, Min. Typ. Max. Units Measurement Circuit Figure 1) Sine wave, 2.5VP-P, 1kHz 0.03 0.1 % Sine wave, 1kHz Maximum input for total higher 2.6 2.8 Vrms harmonic distortion factor < 0.5% LOUT pin DC difference during SW switching 0 15 mV 42 60 78 k 120 b7=0, Sine wave, 2.5VP-P, 1kHz b7=1, Sine wave, 2.5VP-P, 1kHz Sine wave, 2.5V P-P , 1MHz/1kHz Sine wave, 2.5VP-P, 1kHz Sine wave, 1kHz Maximum input for total higher harmonic distortion factor < 0.5% ROUT pin DC difference during switching -6.5 -0.5 -3.0 2.6 42 -6.0 0 0 0.03 2.8 0 60 120 -60 -60 -60 -90 -90 4.0 4.1 3.3 4.6 3.9 0.0 3.0 0.0 -10 -10 4.7 4.0 4.7 4.0 4.7 200 250 4.0 4.3 4.4 3.6 4.9 4.2 15 78 -53 -53 -53 -80 -80 4.6 4.7 3.9 5.2 4.5 1.5 5.0 0.4 +10 +10 100 -5.5 -0.5 1.0 0.1 dB dB % Vrms mV k dB dB dB dB dB V V V V V
GR1 GR2 Frequency characteristics FR Total higher harmonic distortion THDR Input dynamic range Output offset voltage Input impedance Output impedance Crosstalk VOUT YOUT COUT LOUT ROUT Video I/O Pin Voltage Input pin voltage Output pin voltage DR VOFFR ZIR ZOR CTV CTY CTC CTL CTR VVIP VVOP VSOP
TP5 TP5 TP5 TP5 SG7 23
TP1 TP2 TP3 TP4 TP5
Measurement Circuit Figure 2 SG1 input : 4.43MHz, 1VP-P SG2 input : 4.43MHz, 0.5VP-P Measurement Circuit Figure 2 1kHz, 2.5VP-P No signal, no load VOUT pin, No signal, no load YOUT pin, COUT pin, No signal, no load No signal, no load No signal, no load
Audio I/O Pin Voltage Input pin voltage VAIP Output pin voltage VAOP Logic section (Refer to figure below) Input voltage L VIL Input voltage H VIH Low level output voltage (SDA) VOL High level input current IIH Low level input current IIL Clock frequency fSCL Data transmission waiting time tBUF SCL start hold time tHD : STA SCL low level hold time tLOW SCL high level hold time tHIGH SCL start set-up time tSU : STA SDA data hold time tHD : DAT SDA data set-up time tSU : DAT SCL rise time tR SCL fall time tF SCL stop set-up time tSU : STO I2C BUS Control Signal
I2C logic low level discrimination value I2C logic high level discrimination value SDA for 3mA inflow when SDA, SCL=4.5V impressed when SDA, SCL=0.4V impressed
V V V A A kHz S S S S S nS nS 1000 nS 300 nS S
SDA tBUF SCL P S tHD:STA tLOW tHD:DAT tHIGH tSU:DAT tSU:STA Sr tSU:STO P
tR
tF
MITSUMI
I2C BUS Control 4-Input 1-Output AV Switch MM1311
Measurement Circuit
Measurement Circuit 1
MITSUMI
I2C BUS Control 4-Input 1-Output AV Switch MM1311
Measurement Circuit 2 (Crosstalk measurement)
MITSUMI
I2C BUS Control 4-Input 1-Output AV Switch MM1311
I2C BUS
SDA
SCL S 1 2 3 4 5 6 7 8 A 1 2 3 ** 8 A P
S:Start Condition P:Stop Condition ACK:Acknowledge
The I2C BUS is a BUS system developed by Philips for internal use in equipment. Data transmission is carried out by the two SDA and SCL lines, in byte units, with the MSB first from start condition. Control Register The control register contains data sent from the master in order to determine the status of each switch. S Slave address 1 0 0 1 0 0 0/1 R/W 0 A Control register b7 b6 b5 b4 b3 b2 b1 b0 A P
Address byte
Control data
The data format is set as shown in the figure above. The first 7 bits in the address byte are allocated to the slave address, and the remaining 1 bit is allocated to the read/write bit. The read/write bit is set at 0 when using as a control register. The MM1311 slave address can be selected as 90H/92H depending on the status of the ADR pin. When the ADR pin is low it is 90H. The relationship between the control register bits and switch control is as shown below. b7 Gain b6 Select b5 b4 Video-Select b3 b2 b1 Audio-Select b0
Audio S/Comp
The control register bits are reset to 0 when power is applied. MM1311 control is carried out by the 2-byte structure of the 1 address byte and 1 control data byte. All of the remaining data (third byte and after) are ignored. Refer to the separate tables for details on switch control.
MITSUMI
I2C BUS Control 4-Input 1-Output AV Switch MM1311
Status Register The status register contains data for sending device status to the master. S Slave address 1 0 0 1 0 0 0/1 R/W 1 A Control register b7 b6 b5 b4 b3 b2 b1 b0 NA P
Address byte
Control data
The data format is set as shown in the figure above. The first 7 bits in the address byte are allocated to the slave address, and the remaining 1 bit is allocated to the read/write bit. The read/write bit is set at 1 when using as a status register. The MM1311 slave address can be selected as 91H/93H depending on the status of the ADR pin. When the ADR pin is low it is 91H. However, the confirmation response after completion of the status register should be non-acknowledge. The status register output data as shown below. b7 P-ON RESET b6 b5 S1 OPEN b4 S1 SEL b3 S2 OPEN b2 S2 SEL b1 b0
P-ON RESET : Returns 1 for power on reset. However once data read begins, 0 is returned next. S1/S2 OPEN : Returns 0 when the S1/S2 pin is not open, and returns 1 when the S1/S2 pin is open S1/S2 SEL : Returns 0 when the S1/S2 pin is not grounded, and returns 1 when the S1/S2 pin is grounded. S1/S2 OPEN, SEL have 3-value discrimination, and the combinations are as shown below. S1/S2 pin DC voltage 0.8V or less 1.3V or more, 3.5V or less 4.5V or more S1/S2 OPEN 0 0 1 S1/S2 SEL 1 0 0
Power On Reset Power on reset is built in to reset each control register to 0 when power is turned on. Power on reset threshold has hysteresis as shown in the figure below. The IC power on reset status can be discriminated by reading the status register P-ON RESET.
Reset released Undefined Reset status
0.6V
4.3V
5.4V
VCC
MITSUMI
I2C BUS Control 4-Input 1-Output AV Switch MM1311
Switch Control Table
1. Video Output b6 0 0 0 0 0 0 1 1 1 1 1 1 b5 0 0 0 0 1 1 0 0 0 0 1 1 b4 0 0 1 1 0 0 ~ 1 0 0 1 1 0 0 ~ 1 1 1 0 1 0 1 0 1 b3 0 1 0 1 0 1 VOUT Mute MTV-V V1-V V2-V V3-V Mute Mute MTV-V V1-Y+C V2-Y+C V3-V Mute YOUT Mute YIN YIN YIN YIN Mute Mute YIN V1-Y V2-Y YIN Mute COUT Mute CIN CIN CIN CIN Mute Mute CIN V1-C V2-C CIN Mute
2. Audio Output Mute pin b2 0 0 1.5V or less (OPEN) 0 0 1 1 3.0V or more b1 0 0 1 1 0 0 ~ 1 1 b0 0 1 0 1 0 1 LOUT Mute MTV-L V1-L V2-L V3-L Mute Mute ROUT Mute MTV-R V1-R V2-R V3-R Mute Mute
3. Audio Gain Switching b7 0 1 Output gain -6dB output 0dB output
MITSUMI
I2C BUS Control 4-Input 1-Output AV Switch MM1311
Example of Application Circuit
Notes 1 : VOUT is set at 4.4V and CIN at 4.3V. Please note that capacitance polarity may vary depending on comb filter bias. Notes 2 : Each audio output can be muted by making pin 19 high. Mute is off when it is open or low.

▲Up To Search▲

Price & Availability of MM1311

	To Download MM1311 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .